/*
 * soc_tb.v
 * 
 * Copyright 2024 dh33ex <dh33ex@riseup.net>
 * 
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 3 of the License, or
 * (at your option) any later version.
 * 
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 * 
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA or visit <http://www.gnu.org/licenses/>.
 * 
 * 
 */

`timescale 10 ns / 1 ps

`define SOC_FREQ 100

module soc_tb;
    
    parameter t_clk_per = 1;
    parameter DURATION = 120000;  /* 1200000 */
    
    
    reg     tb_clock;
    reg     tb_reset;
    
    reg  [31:0] tb_gpio_2;
    wire [31:0] tb_gpio_1;
    
    /* start message and file_dump setup */
    initial begin
        $dumpfile("soc_wave.vcd");
        $dumpvars(0, soc_tb);
    
        $display("32-bit soc test bench initiating...");
        #(DURATION);
        $display("Finished.");
        $finish;
    end
    
    /* clock simulating */
    initial forever begin
        tb_clock = 1'b0;
        #(0.5 * t_clk_per);
        
        tb_clock = 1'b1;
        #(0.5 * t_clk_per);
    end
    
    /* button simulating */
    initial forever begin
        tb_gpio_2 = 1;
        #(100 * t_clk_per);
        
        tb_gpio_2 = 0;
        #(100 * t_clk_per);
    end
    
    /* reset */
    initial begin
        tb_reset = 1'b1;
        #(5 * t_clk_per);
        tb_reset = 1'b0;
    end
    
    soc soc(
        .i_clk(tb_clock),
        .i_rst(tb_reset),
        .i_gpio(tb_gpio_2),
        .o_gpio(tb_gpio_1)
    );
    
endmodule
